Packaging constitutes the last phase of single or multiple chip device fabrication and provides the necessary interconnects between chip and chip carrier. Packaging further provides an enclosure protecting against environmental influences such as chemical corrosion and damage due to thermal and mechanical impact or irradiation.
Thermo-mechanical stress induced defects have become a reliability issue impacting the lifetime of electronic devices. Delamination at the contact interface between chip and chip carrier and crack formation at or in the vicinity of the interface have been identified as contributor to the problem. A cause for the appearance of such defects is the application of high temperature or high pressure processes during device manufacturing including assembly and packaging.